Hardware Design & EMC Reference Notes

1. The Non-Ideal Component Model

Components in the real world are never perfect; they always possess parasitic properties that dominate at high frequencies.

  • The Real Capacitor: $C_{total} = C + R_{ESR} + L_{ESL}$
    • $C$ (Ideal Capacitance): Stores energy.
    • $R_{ESR}$ (Equivalent Series Resistance): Causes heat dissipation and voltage ripple during charge/discharge cycles.
    • $L_{ESL}$ (Equivalent Series Inductance): Limits high-frequency filtering. Above its self-resonant frequency, a capacitor effectively acts as an inductor.

2. Electromagnetic Compatibility (EMC)

EMC ensures your device doesn’t emit too much noise (EMI) and can withstand external noise (EMS).

Emissions (EMI)

  • FCC Class B: The standard for residential devices (stricter than Class A for industrial).
    • Key constraint: In the $30 \text{ MHz} - 88 \text{ MHz}$ range, radiated emissions must be $< 40 \text{ dB}\mu\text{V/m}$ (measured at a 3-meter distance).
  • CE (Conducted & Radiated Emissions): European conformity standards regulating noise pushed back onto the AC mains and radiated into space.

Susceptibility / Immunity (EMS)

How well the device survives external electrical abuse:

  • ESD (Electrostatic Discharge): High voltage, fast transients (e.g., static shock from a user).
  • EFT (Electrical Fast Transient): Bursts of high-frequency pulses, often from switching inductive loads on the power grid.
  • Surge: High energy, low-frequency spikes (e.g., nearby lightning strikes).

3. PCB Traces & Loop Inductance

The physical layout of a PCB dictates its electromagnetic behavior.

  • The Trace is an Inductor: Every trace has parasitic inductance.
  • Voltage Drop (Ground Bounce / Ringing): Calculated as $V_{drop} = L \frac{dI}{dt}$. Rapid switching of currents ($dI/dt$) across trace inductance ($L$) causes voltage spikes.
  • The Antenna Effect: A trace suspended in free space (or routed poorly over a broken ground plane) acts as a monopole antenna, radiating EMI.
  • Loops = Magnetic Field Generators: The area between the source signal and its return path forms a loop. A larger loop area acts as a stronger loop antenna, radiating and receiving more magnetic interference.
  • The Golden Rule of Return Currents: Current always returns to its source.
    • At low frequencies ($< 10 \text{ kHz}$), current takes the path of least resistance (the shortest physical path).
    • At high frequencies ($> 100 \text{ kHz}$), current takes the path of least impedance (the path directly underneath the signal trace, which minimizes the loop area).

4. Signal Integrity & Routing Rules

Managing how signals interact with each other and their environment.

  • Mixed-Signal Routing (MCU $\rightarrow$ Power $\rightarrow$ ADC): Keep noisy digital circuits (MCU) strictly separated from sensitive analog circuits (ADC). They should share a single solid ground plane, but digital return currents must never be allowed to cross under analog components. Power to the ADC should be filtered (e.g., using a ferrite bead and decoupling caps).
  • Crosstalk: The unwanted coupling of signals between adjacent traces.
    • Capacitive Coupling: Driven by parasitic capacitance ($C_m$) due to parallel traces; sensitive to high $dV/dt$.
    • Inductive Coupling: Driven by mutual inductance ($L_m$) from overlapping magnetic fields; sensitive to high $dI/dt$.
  • The 3W Rule: To minimize crosstalk, the distance between the centers of two adjacent traces should be at least 3 times the trace width (W). This reduces coupling by approximately 70%.

5. Standard 4-Layer PCB Stackup

A good stackup is the foundation of good EMC. This specific 4-layer configuration ensures low-impedance return paths and good signal integrity.

  1. Top Layer (Signal): Primary routing for high-speed components and microstrips.
  2. Inner Layer 1 (Solid GND Plane): Crucial! Provides an immediate, low-impedance return path for the Top Signal layer, minimizing loop area.
  3. Inner Layer 2 (Power / Signal): Used for power distribution (VCC planes/polygons) and slower, non-critical signal routing.
  4. Bottom Layer (Signal): Secondary routing layer.

Tip: When laying out the board, always visualize the invisible return path of your high-speed signals. If you force the return current to take a detour around a split in the ground plane, you have just created an antenna.

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